An interconnect circuit board or package is the physical realization of electronic circuits or subsystems from a number of extremely small circuit elements electrically and mechanically interconnected. It is frequently desirable to combine these diverse type electronic components in an arrangement so that they can be physically isolated and mounted adjacent to one another in a single compact package and electrically connected to each other and/or to common connections extending from the package.
Complex electronic circuits generally require that the circuit be constructed of several levels of conductors separated by corresponding insulating dielectric tape layers. The conductor layers are interconnected through the dielectric layers that separate them by electrically conductive pathways, called via fills.
In all subsequent discussion it is understood that the use of the term tape layer or dielectric layer implies the presence of metallizations both surface conductor and interconnecting via fills which are cofired with the ceramic tape. In a like manner the term laminate or composite implies a collection of metallized tape layers that have been pressed together to form a single entity.
The use of a ceramic-based green tape to make low temperature co-fired ceramic (LTCC) multilayer circuits was disclosed in U.S. Pat. No. 4,654,095 to Steinberg. The co-fired, free sintering process offered many advantages over previous technologies. However, when larger circuits were needed, the variation of firing shrinkage along the planar or x,y direction proved too broad to meet the needs. Given the reduced sizes of the current generation of surface mount components, the shrinkage tolerance (reproducibility of x,y shrinkage) has proved too great to permit the useful manufacture of LTCC laminates much larger than 6″ by 6″. This upper limit continues to be challenged today by the need for greater circuit density as each generation of new circuits and packages evolves. In turn this translates into ever-smaller component sizes and thereby into smaller geometry's including narrower conductor lines and spaces and smaller vias on finer pitches in the tape. All of this requires a much lower shrinkage tolerance than could be provided practically by the free sintering of LTCC laminates.
A method for reducing x,y shrinkage during firing of green ceramic bodies in which a release layer, which becomes porous during firing, is placed upon the ceramic body and the assemblage is fired while maintaining pressure on the assemblage normal to the body surface was disclosed in U.S. Pat. No. 5,085,720 to Mikeska. This method used to make LTCC multilayer circuits provided a significant advantage over Steinberg, as a reduction x,y shrinkage was obtained through the pressure assisted method.
An improved co-fired LTCC process was developed and is disclosed in U.S. Pat. No. 5,254,191 to Mikeska. This process, referred to as PLAS, an acronym for pressure-less assisted sintering, placed a ceramic-based release tape layer on the two major external surfaces of a green LTCC laminate. The release tape controls shrinkage during the firing process. Since it allows the fired dimension of circuit features to be more predictable the process represents a great improvement in the fired shrinkage tolerance.
A slight modification of the art proposed by Mikeska is presented in U.S. Pat. No. 6,139,666 by Fasano et al. where the edges of a multilayer ceramic are chamfered with a specific angle to correct edge distortion, due to imperfect shrinkage control exerted by externally applied release tape during firing.
Shepherd proposed another process for control of registration in an LTCC structure in U.S. Pat. No. 6,205,032. The process fires a core portion of a LTCC circuit incurring normal shrinkage and shrinkage variation of an unconstrained circuit. Subsequent layers are made to match the features of the pre-fired core, which then is used to constrain the sintering of the green layers laminated to the rigid pre-fired core. The planar shrinkage is controlled to the extent of 0.8–1.2% but is never reduced to zero. For this reason, the technique is limited to a few layers, before registration becomes unacceptable.
During the release tape-based constrained sintering process, the release tape acts to pin and restrain any possible shrinkage in x- and y-directions. The release tape itself does not sinter to any appreciable degree and is removed prior to any subsequent circuit manufacturing operation. Removal is achieved by one of a number of suitable procedures such as brushing, sand blasting or bead blasting. The use of the sacrificial constraining tape or release tape means that the user must purchase a tape material that does not reside in the final product. Furthermore, the top and bottom conductors cannot be co-processed with the laminate. These necessary steps may only be carried as part of a post-fired strategy after firing and removal of the release tape.
In a more recent invention, U.S. patent application 60/385,697 the teachings of constrained sintering are extended to include the use of a non-fugitive, non-removable, non-sacrificial or non-release, internal self-constraining tape. The fired laminate comprises layers of a primary dielectric tape which define the bulk properties of the final ceramic body and one or more layers of a secondary or self-constraining tape. The purpose of the latter is to constrain the sintering of the primary tape so that the net shrinkage in the x, y direction is zero. This process is referred to as a self-constraining pressure-less assisted sintering process and the acronym SCPLAS is applied. The self-constraining tape is placed in strategic locations within the structure and remains part of the structure after co-firing is completed. There is no restriction on the placement of the self-constraining tape other than that z-axis symmetry is preserved.
FIG. 1, which contains some generic dielectric tape arrangements, is used to illustrate the definition of z-axis symmetry as noted in U.S. Patent Application 60/385,697. In this embodiment, only one type of self-constraining (SC) tape (101) is used with a primary tape (100). The criterion is that the distribution of the two tape materials (100, 101) is balanced in terms of thickness and position around the centerline (103) of the structure. The consequence of not preserving z-axis symmetry is a severely bowed or cambered circuit.
The invention described in U.S. patent application 60/385,697 represents an alternative to release tape-based constrained sintering. However, it is not obvious as to how one can apply this to the practical manufacture of ceramic structures with asymmetric arrangements of metallized tape layers comprising two different dielectric chemistries.
The introduction of dielectric layers with a higher dielectric constant (k) than the bulk dielectric material can produce localized enhanced capacitor capability when suitably terminated with a conductor material. This is commonly referred to as a buried passive structure and is a robust and cost-effective alternative to the use of standard, externally applied, surface mount components such as multilayer capacitors (MLC). In U.S. Pat. No. 5,144,526 awarded to Vu and Shih, LTCC structures are described whereby high dielectric constant materials are interleaved with layers of low dielectric constant material in a symmetrical arrangement.
In practical terms the need for symmetry limits the freedom of a designer to layout a circuit in its most optimal form. This, in turn, has some unfavorable consequences relative to the performance, the form factor and the overall cost of the circuit. An ability to obviate this problem represents a significant competitive advantage to the continued growth of ceramic circuit packages. The only solution currently available, namely, to balance the asymmetrical and functional part of the structure with dummy, non functioning compensating layers (see FIG. 2) does not alleviate all of the disadvantages described above.
FIG. 3 shows some examples of some simple asymmetric arrangements. Actual designs would be more complex. Nonetheless, regardless of the complexity factor, the most intractable problem associated with such arrangements is that the structure will bow or camber to an unacceptable degree after co-firing. Moreover it will be cambered to a degree that will render it unusable for subsequent processing such as assembly by pick and place of passive and active surface components. The conventional definition of unacceptable camber or bowing is greater than an 0.003 inch deflection of the center point of a substrate per one inch of substrate diagonal length, e.g. a total of 0.025 inches for a 6″×6″ co-fired substrate. Different operations have different requirements but the above definition meets the majority of applications. The extent of this disadvantage increases with substrate size. It can pass almost unnoticed for substrates less than 2″×2″ but becomes very marked as the standard substrate dimension is increased to 6″×6″.
The above problem is caused by differences in the physical and chemical properties of the two dielectric materials in contact with each other and exists with all known combinations of dielectric chemistries. It will occur regardless of the absence or presence of metallic conductors in the structure. It thus represents a significant limitation to the ongoing development of the technology as a whole.
In a more recent application, U.S. patent application Ser. No. 10/430,081, the teachings of constrained sintering is extended to the production of large area camber-free, co-fired LTCC structures that are derived from asymmetric arrangements of low dielectric constant primary tape and high k dielectric constant self-constraining tape materials, each of a different chemistry. It combines the use of both of internal, permanent, self-constraining tape and external, removable release constraining tape.
As already discussed the asymmetric structures as illustrated in FIG. 3 cannot be co-fired flat by conventional processing techniques. They will tend to bow or camber in a concave manner i.e. the two edges of the laminate will be significantly higher than the center-point in the direction perpendicular to the plane of maximum asymmetry.
In an embodiment of U.S. patent application Ser. No. 10/430,081, now U.S. Pat. No. 6,827,800 as shown in FIG. 4, an internal constraining layer (101) is formulated to provide a self-constraining function and an embedded capacitor function within a LTCC assembly. The properties of the processed internal constraining layer provide a rigid physical form restraining x and y shrinkage of primary tapes (100) and impart functional properties to the final LTCC assembly. The internal constraining tape precedes the sintering of the primary tape layers. To prevent bowing and permanent structural distortion after co-firing because of the difference in dielectric chemistries without the need to symmetrically balance it with dummy or compensating layers, a layer of removable, non permanent release layer (201) is applied to the outside surface directly opposite the source of greatest asymmetry. This enables extremely asymmetric structures to be fired flat. After firing, the release layer is removed using conventional brushing or sand blasting methods.
However, the necessary inclusion of a release layer (201) and its removal after firing still adds cost in material, equipment, and process. Meanwhile, the bottom conductor in contact with the release layer cannot be co-processed with the laminate. This necessary step may only be carried as part of a post-fired strategy after firing and removal of the release tape.
The current invention represents an innovative approach to produce a structure exhibiting an interactive suppression of x,y shrinkage without the use of a sacrificial dielectric release tape at one side of the laminate as specified in U.S. patent application Ser. No. 10/430,081 now U.S. Pat. No. 6,827,800.